HP Unveils Third-generation 64-bit PA-8500 Processor
Original Document
HP Unveils Third-generation 64-bit PA-8500 Processor
Industry's Largest On-chip Cache Provides Superior Performance for
Enterprise Applications
San Jose Calif., Oct. 13, 1998
Here at Microprocessor Forum, Hewlett-Packard Company today announced
availability of its third-generation 64-bit PA-8500 processor, combining
leading performance, 1.5MB of on-chip cache and increased scalability for
HP's enterprise-class workstations and servers.
The new processor enhances performance of data-intensive applications
for the Internet, data warehousing, transaction processing and Computer
Aided Design, which require concurrent acceleration of multiple operations.
Offering complete software compatibility with existing PA-RISC systems, the
PA-8500's leading performance is enabled, in part, by integration of 1.5MB
of L1 memory cache, which HP believes is the industry's highest on-chip
memory level, which minimizes system latency and boosts performance.
Additionally, this processor is HP's first to use the .25-micron
manufacturing process. This advanced process makes it possible for the
PA-8500 to contain 140 million transistors, more transistors than any other
processor.
The PA-8500 will be offered at two speeds for specific applications,
440MHz for systems such as the HP 9000 V-Class Enterprise server and 360MHZ
for systems such as HP's C-Class workstations. V-Class servers implementing
these third-generation 64-bit processors are scheduled for introduction
before the end of the year. A board upgrade utilizing the PA-8500 operating
at 360MHz for C-Class workstations is orderable and is slated to ship in
January.
Superior Capabilities
Preliminary estimates for this processor establish a leadership position
for PA-RISC(1) compared to other technologies. Initial peak
performance levels for the 440MHz PA-8500 are SPECint95 (integer operation)
greater than 32 and SPECfp95 (floating-point operation) greater than 52.
Official performance benchmarks will be available at release of
PA-8500-based systems.
"While the PA-8500 delivers strong benchmark scores, it should do even
better on the large and complex workloads often found in enterprise
systems," said Linley Gwennap, publisher and editorial director of
Microprocessor Report and vice president, publications for MicroDesign
Resources. "The new processor will solidify HP's performance position
through the debut of IA-64 in 2000."
"Innovative PA-RISC enhancements will continue to provide leading
performance under real-world conditions for HP's workstations and servers,"
said Denny Georg, systems and technology manager for HP's Enterprise
Systems Group. "This ongoing innovation enables HP to fulfill the
increasingly demanding requirements of enterprise customers."
Product Enhancements
The PA-8500 incorporates enhanced branch prediction capabilities,
reducing branch mispredicts, a significant processor limitation. Reducing
mispredictions further focuses processor resources on actual system
operations, elevating true performance. Enhancements to data pipelines and
bus interfaces increase transfer rates and further optimize performance for
high-end applications.
Rapid development enabled HP to release the PA-8500 at 440MHz six months
ahead of schedule, demonstrating HP's expertise in providing advanced
processor technology. The PA-8500 represents the third generation of HP's
aggressive out-of-order processor initiative, incorporating capabilities
that optimize system performance and enhance processing of multiple
operations simultaneously. Other companies, including Digital and Sun
Microsystems, have yet to release first-generation processors incorporating
this capability.
HP also continues its support of binary compatibility across its entire
PA-RISC family, enabling seamless interoperability with legacy applications
on HP systems. Binary compatibility protects customers' investments,
enabling rapid growth and adoption of new technology infrastructures. In
addition, customers can utilize existing applications and operating systems
with advanced processor technology for distinct performance improvements.
HP will continue to support binary compatibility through the
introduction of IA-64-based processors. As a result of HP's co-development
work with Intel on EPIC (Explicitly Parallel Instruction Computing), the
technology foundation for IA-64, today's HP-UX(2), Windows NT and MPE/iX applications will
run unchanged on IA-64. For maximum performance, these applications can be
recompiled without source changes.
In a separate announcement, HP today disclosed its long-term PA-RISC
roadmap, with frequency estimates, providing an overview of future
performance for the processor family. These plans ensure that the PA-RISC
family will continue its performance leadership well into the next century.
About HP
Hewlett-Packard Company is a leading global provider of computing,
Internet and intranet solutions, services, communications products and
measurement solutions, all of which are recognized for excellence in
quality and support. HP has 127,200 employees and had revenue of $42.9
billion in its 1997 fiscal year.
Information about HP and its products can be found on the World Wide Web
at http://www.hp.com.
- PA-RISC stands for Precision
Architecture-reduced-instruction-set computing.
- HP-UX Release 10.20 and later and HP-UX Release 11.00 and later (in
both 32- and 64-bit configurations) on all HP 9000 computers are Open Group
UNIX 95 branded products.
(c) Copyright 1998 Hewlett-Packard Company.